The present application relates to an interconnect structure and a method of forming the same. More particularly, the present application relates to a low resistance interconnect structure in which voids between the inner sidewalls of a diffusion barrier liner and an interconnect metal or metal alloy structure are prevented.
Generally, semiconductor devices include a plurality of circuits that form an integrated circuit (IC) fabricated on a semiconductor substrate. A complex network of signal paths will normally be routed to connect the circuit elements distributed on the surface of the substrate. Efficient routing of these signals across the device requires formation of multilevel or multilayered schemes, such as, for example, single or dual damascene wiring structures. The wiring structures typically include copper, Cu, since Cu based interconnects provide higher speed signal transmission between large numbers of transistors on a complex semiconductor chip as compared with aluminum, Al, based interconnects.
As the interconnect structure feature sizes shrink, it is necessary to scale barrier thickness in order to maximize copper volume and to enable low line and via resistance. Scaling the sidewall barrier thickness allows maximization of copper volume in interconnect structures, and scaling the barrier thickness at the via bottom allows reduction of via resistance.
For void-free copper fill at less than about 24 nm critical dimensions, an additional liner or seed enhancement layer such as, for example, a layer of ruthenium, is needed to avoid barrier exposure during copper plating, especially on the sidewalls. Without a seed enhancement layer, sidewall voids will form and lead to poor electromigration (EM) performance. The presence of a seed enhancement layer, however, has a negative impact on the via and line resistance. As such, there is a need for providing an interconnect structure that includes a seed enhancement layer, while avoiding an increase in the via and line resistance of the interconnect structure.